There is a continuing effort to reduce the dimensions of integrated circuit (IC) devices, and this has required greater precision in the tools used to manufacture IC devices. IC devices are designed using computer-aided design (CAD) or technology-computer-aided design (TCAD) layout tools which allow designers and manufacturers to plan the layout of circuits on a semiconductor wafer. The finished designs must be transferred to the wafer in a manner that allows device features to be produced by various processes of etching, depositing, implanting, and the like. This is done by applying a photoresist (also known as resist) layer to the surface of the wafer and then exposing the photoresist to radiation transmitted through a mask or reticle having patterns of transparent and opaque areas according to the feature or features to be formed. The exposed photoresist is developed to provide openings in the photoresist layer through which the surface of the wafer is exposed for the process desired. This process of transferring the pattern to the wafer is generally referred to as photolithography. The finished product typically includes a number of patterned layers formed on the wafer, in which the patterns in different layers (or levels) are aligned to allow the formation of IC devices and circuit interconnection. Each patterned level or layer is typically formed using a separate mask or reticle layout pattern designed to form the desired pattern for that patterned level or layer.
The overall resolution of a photolithographic process refers to the minimum feature size (i.e., typically a critical dimension, or CD) that can be adequately printed, or “resolved,” within specifications such as line-width variation (e.g. typically within about 10%), resist wall angle (e.g.≧85°) and minimum resist thickness after develop. This overall resolution limit depends on the resolution of the optical lithographic system, the properties of the resist as well as the subsequent etch processes. The resolution of the lithography (optical) system, that is, the ability to form a resolvable image pattern on the wafer, is critical to the overall process, and can be improved by resolution enhancement techniques (RETs), including modifications of the mask or reticle, as discussed in more detail below.
The resolution R of an optical lithography system is conventionally quoted in terms of the smallest half-pitch of a grating that is resolvable as a function of illumination wavelength λ and a numerical aperture NA, as expressed by Rayleigh's equation, R=k1λ/NA, where k1 is the Rayleigh constant. For conventional optical lithography, the ultimate resolution limit is reached at k1=0.5, the state at which only one set of diffracted orders can pass through the imaging optical system. Even as exposure wavelengths decrease from 248 nm to 157 nm, and numerical apertures increase from 0.5 to 0.85, conventional optical lithography is still challenged by resolution below k1=0.5. Approaching k1=0.5 imposes formidable problems due to image quality degradation associated with the loss of increasing numbers of diffracted orders.
At low k1 imaging, significant modifications to mask designs are required to print features in the desired fashion on the wafer. Due to the extreme sensitivity of many of these features to errors on the mask, in the stepper lens or in the lithography process (e.g. focus and dose), it is critical that these mask design modifications, or resolution enhancement techniques (RETs), be done properly. Resolution enhancement techniques such as optical proximity correction (OPC), subresolution-assist-feature-enhancement (SRAF) lithography and phase-shifted-mask-enhanced (PSM) lithography have become increasingly important as resolution has increased beyond the quarter-micron level. In addition, RETs have been combined with the use of off-axis illumination (OAI) and advanced resist processing to bring the k1 value closer to 0.25.
Off-axis illumination (OAI) provides resolution enhancement by modifying the illumination direction incident on the mask so as to eliminate or reduce on-axis illumination. For on-axis (i.e., propagation along the optical axis) light incident on a grating having pitch P, the. mth diffracted order will propagate at an angle θm=sin−1(mλ/P). However, only non-zero diffracted orders contain information about the grating, so at least one non-zero order must be collected in order to form an image. In other words, the projection lens must be large enough to collect at least the first order diffracted beams as well as the zero order beam. For the case of on-axis illumination, the first order diffracted beams m=−1 and m=+1 will propagate at an angles θ1=±sin−1(λ/P) relative to the optical axis, and thus the smallest pitch will be limited by the ability of the optical system to collect at least 3 beams (i.e., m=−1, 0, and +1), that is, a projection lens capable of collecting orders subtending an angle 2θ1. For a grating having equal lines and spaces having pitch P and line widths (CD) equal to P/2, the minimum feature size resolvable by such a lithographic system is d=0.5λ/NA, where sin(θ1)=NA, and thus k1=0.5 as discussed above.
FIG. 1 schematically illustrates an optical projection lithographic system in which illumination light (actinic energy) is provided through the aperture of pupil 110, and collected by a condenser lens 120. An illumination beam 130 is directed to a mask or reticle 140. The light is diffracted by the mask 140, creating diffracted orders m=0,±1,±2, . . . , which are then collected by a projection lens 150, and then projected to the wafer 160. In the case of off-axis illumination (OAI), the zeroth order beam will propagate undiffracted at an angle θ0 from the optical axis 101, as illustrated in FIG. 1, but only one of the +1 or −1 diffracted orders, propagating at angle θ1, need be collected in order to form an image on the wafer 160. Thus, OAI provides resolution enhancement because the angle collected by the lithographic system will allow a correspondingly smaller grating pitch P to be used. The angle of propagation can be optimized for a primary or target pitch. In addition, if the angle of off-axis illumination is chosen so that zero order and one of the first orders are at the same distance from the center of the pupil of the projection lens 150, the relative phase difference between the zeroth order and that first order will be zero, making the image less subject to defocus, and thus increasing the depth of focus (DOF) for an associated pitch.
The drawback of OAI is that,pitches other than the primary pitch will print with degraded process windows. In addition, since there are no discrete diffracted orders for isolated lines, there is little improvement of resolution for isolated lines as compared to densely pitched lines and spaces. The use of sub-resolution assist features provides a means of recovering the process window for pitches that are not enhanced by the OAI. By creating nonprinting (non-resolved or sub-resolution) supplementary patterns next to the primary patterns in such a way that the combined layout approximately reproduces the primary pitch, thus producing the required interference effects, the overall process window can be improved.
Sub-resolution assist features (SRAFs), also known as scattering bars or intensity leveling bars, that are incorporated in photomask layouts, can provide significant lithographic benefit (e.g. improved process window) in the imaging of very large scale integrated (VLSI) circuit patterns when used in conjunction with OAI (e.g. annular illumination). Methods for selecting size and placement of SRAFs have been discussed in the prior art.
One method for placing assist features (SRAFs) is to simply provide for placement of a small, finite number (e.g. one or two) of assist features having fixed (sub-resolution) width. Referring to FIG. 2A, adjacent critical features 11 (e.g. lines) may have variable spacing, but a primary pitch P0 for patterns of lines 11 that are periodic (in FIG. 2A, the direction of periodicity is assumed to be in the x-direction, but for convenience, only two of the repeating features 11 are shown). The primary pitch is often one that is deemed to be critical, for example, to ensure good overlay of features with features formed in an underlying layer. Industry standard practice is to use place a maximum of SRAFs 10, 12, 14, 16, 18, 20, 22 between two lines 11, where the widths and placements of the SRAFs are fixed. The resulting pitches P1, P2, P3, and P4 will not typically match the primary pitch P0, and will often result in less than optimal lithographic process windows. Referring to FIG. 2B, the case of an isolated line 15 is illustrated, in which only one assist feature 24, 26 is provide per edge of the isolated line 15. (A feature is deemed lithographically “isolated” if the distance from the feature to a nearest neighbor effectively exceeds the range of significant optical interaction.) However, even though the placement of assist features 24 and 26 may correspond to P0, using only two SRAFs is typically inadequate to reproduce the interference effect required to obtain an optimal process window.
The assignment of assist feature width, number and location is preferably optimized to yield the best through-pitch linewidth control or overall process window. The size of assist features must be chosen so that they are large enough to have the desired process window enhancement but small enough not to resolve as actual patterns on an exposed wafer. In addition, decisions must be made regarding where to place assist features, and how many must be added. Such optimization, however, requires very costly and time-consuming theoretical and experimental processes. For example, FIG. 2C illustrates a more preferred placement of assist features in which as many as 4 assist features (20, 23, 25, 22) may be placed, and where assist feature positions P1, P2, P3, P4, P5 and P6 are determined empirically to provide improved process windows. Similarly, for the case of isolated features 15, assist features 28, 30 are provided in addition to assist features 24, 26 at locations P7, P8 as illustrated in FIG. 2D. The locations P7, P8 of assist features 24, 26, 28 and 30 are determined empirically to provide good process window parameters, which can be a costly and time-consuming process. For example, for critical feature pitches that require 4 SRAFs (20, 23, 25, 22), there are at least 4 parameters (P5, P6, w1, w2) that can be varied. Thus, evaluating only three values for each of those 4 variable dimensions results in 34 (3 to the fourth power), or 81 possible combinations of parameters. Since a typical layout may have several tens or hundreds of possible pitches to evaluate, the empirical evaluation of all combinations quickly becomes impractical. Furthermore, there are many more possibilities for each parameter, and even this impractically large number of data points represents a sparse sampling for realistic layout configurations.
Thus, there remains a need to provide for a method for implementing sub-resolution assist features in lithographic mask or reticle designs that maximizes process window in a fast, cost-effective manner.